Cognitive Radar System Using Xilinx RFSoC

Our Solution

DornerWorks FPGA engineers helped configure a 3rd-generation Xilinx Zynq UltraScale + RFSoC to support and accelerate the customer’s IP while reducing size, weight and power (SWaP) to enable a next-generation tracking solution.

We worked collaboratively with university and commercial partners who contributed machine learning algorithms to the project. DornerWorks engineers ported one of those algorithms over to the RFSoC. This was then integrated into the overall system.

DornerWorks FPGA engineering team focused on:

• Clocking
• Board level using Texas Instruments software
• FPGA ADC and DAC AXI-Streams
• RF Data Converter (RFDC)
  • Initial settings for ADCs, DACs, and FPGA clocking
  • Software drivers to update programmable settings
• Example designs for narrow band (transmit and receive) and wide band (receive)
• Vivado project including RFDC settings
• Vitis project using bare-metal software drivers to control RFDC settings
• Instructions for creating RF Analyzer compatible example design
• Stand-alone with separate tool for board clock configuration
• Integrated with bare-metal software for board clock configuration

The customer now has a cognitive radar solution with improved SWaP compared with previous implementations to help keep modern warfighters safer in dangerous environments.